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Write amplification

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Write amplification (WA) is an undesirable phenomenon associated with <a href="Flash_memory" title="Flash memory">flash memory</a> and <a href="Solid-state_drive" title="Solid-state drive">solid-state drives</a> (SSDs) where the actual amount of information physically written to the storage media is a multiple of the logical amount intended to be written.

Because flash memory must be erased before it can be rewritten, with much coarser granularity of the erase operation when compared to the write operation,<a href="#cite_note-3">[a]</a> the process to perform these operations results in moving (or rewriting) user data and <a href="Metadata" title="Metadata">metadata</a> more than once. Thus, rewriting some data requires an already-used-portion of flash to be read, updated, and written to a new location, together with initially erasing the new location if it was previously used. Due to the way flash works, much larger portions of flash must be erased and rewritten than actually required by the amount of new data. This multiplying effect increases the number of writes required over the life of the SSD, which shortens the time it can operate reliably. The increased writes also consume <a href="Bandwidth_(computing)" title="Bandwidth (computing)">bandwidth</a> to the flash memory, which reduces write performance to the SSD.<a href="#cite_note-IBM_WA-1">[1]</a><a href="#cite_note-K_Smith-4">[3]</a> Many factors will affect the WA of an SSD; some can be controlled by the user and some are a direct result of the data written to and usage of the SSD.

<a href="Intel" title="Intel">Intel</a> and <a href="SiliconSystems" class="mw-redirect" title="SiliconSystems">SiliconSystems</a> (acquired by <a href="Western_Digital" title="Western Digital">Western Digital</a> in 2009) used the term write amplification in their papers and publications in 2008.<a href="#cite_note-Lucchesi-5">[4]</a> WA is typically measured by the ratio of writes committed to the flash memory to the writes coming from the host system. Without <a href="Data_compression" title="Data compression">compression</a>, WA cannot drop below one. Using compression, <a href="SandForce" title="SandForce">SandForce</a> has claimed to achieve a write amplification of 0.5,<a href="#cite_note-Anand_WA-6">[5]</a> with best-case values as low as 0.14 in the SF-2281 controller.<a href="#cite_note-7">[6]</a>

<div class="mw-heading mw-heading2"><h2 id="Basic_SSD_operation">Basic SSD operation</h2></div>

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</style><div role="note" class="hatnote navigation-not-searchable">See also: <a href="Flash_memory" title="Flash memory">Flash memory</a> and <a href="Solid-state_drive" title="Solid-state drive">Solid-state drive</a></div>

Due to the nature of flash memory's operation, data cannot be directly overwritten as it can in a <a href="Hard_disk_drive" title="Hard disk drive">hard disk drive</a>. When data is first written to an SSD, the <a href="Flash_memory#Principles_of_operation" title="Flash memory">cells</a> all start in an erased state so data can be written directly using <a href="Flash_memory#NAND_memories" title="Flash memory">pages</a> at a time (often 4–8 <a href="Kilobytes" class="mw-redirect" title="Kilobytes">kilobytes</a> (KB) in size). The <a href="Flash_controller" class="mw-redirect" title="Flash controller">SSD controller</a> on the SSD, which manages the flash memory and <a href="Interface_(computer_science)" class="mw-redirect" title="Interface (computer science)">interfaces</a> with the host system, uses a logical-to-physical mapping system known as <a href="Logical_block_addressing" title="Logical block addressing">logical block addressing</a> (LBA) that is part of the <a href="Flash_Translation_Layer" class="mw-redirect" title="Flash Translation Layer">flash translation layer</a> (FTL).<a href="#cite_note-IBM_Hu_Haas-8">[7]</a> When new data comes in replacing older data already written, the SSD controller will write the new data in a new location and update the logical mapping to point to the new physical location. The data in the former location is no longer valid, and will need to be erased before that location can be written to again.<a href="#cite_note-IBM_WA-1">[1]</a><a href="#cite_note-IBM_Perf-9">[8]</a>

Flash memory can be programmed and erased only a limited number of times. This is often referred to as the maximum number of <a href="Flash_memory#Memory_wear" title="Flash memory">program/erase cycles</a> (P/E cycles) it can sustain over the life of the flash memory. <a href="Single-level_cell" class="mw-redirect" title="Single-level cell">Single-level cell</a> (SLC) flash, designed for higher performance and longer endurance, can typically operate between 50,000 and 100,000 cycles. As of 2011, <a href="Multi-level_cell" title="Multi-level cell">multi-level cell</a> (MLC) flash is designed for lower cost applications and has a greatly reduced cycle count of typically between 3,000 and 5,000. Since 2013, <a href="Triple-level_cell" class="mw-redirect" title="Triple-level cell">triple-level cell</a> (TLC) (e.g., 3D NAND) flash has been available, with cycle counts dropping to 1,000 <a href="Program-erase_cycle" class="mw-redirect" title="Program-erase cycle">program-erase</a> (P/E) cycles. A lower write amplification is more desirable, as it corresponds to a reduced number of P/E cycles on the flash memory and thereby to an increased SSD life.<a href="#cite_note-IBM_WA-1">[1]</a> The wear of flash memory may also cause performance degrade, such as I/O speed degrade.

<div class="mw-heading mw-heading2"><h2 id="Calculating_the_value">Calculating the value</h2></div>

Write amplification was always present in SSDs before the term was defined, but it was in 2008 that both Intel<a href="#cite_note-Lucchesi-5">[4]</a><a href="#cite_note-10">[9]</a> and SiliconSystems started using the term in their papers and publications.<a href="#cite_note-Zsolt_Silicon_Systems-11">[10]</a> All SSDs have a write amplification value and it is based on both what is currently being written and what was previously written to the SSD. In order to accurately measure the value for a specific SSD, the selected test should be run for enough time to ensure the drive has reached a <a href="Steady_state" title="Steady state">steady state</a> condition.<a href="#cite_note-K_Smith-4">[3]</a>

A simple formula to calculate the write amplification of an SSD is:<a href="#cite_note-IBM_WA-1">[1]</a><a href="#cite_note-OCZ_WA-12">[11]</a><a href="#cite_note-13">[12]</a>

<mtext>write amplification</mtext>

</mrow>

<mfrac>

<mtext>data written to the flash memory</mtext>

<mtext>data written by the host</mtext>

</mfrac>

</mrow>

</mstyle>

</mrow>

<annotation encoding="application/x-tex">{\displaystyle {\text{write amplification}}={\frac {\text{data written to the flash memory}}{\text{data written by the host}}}}</annotation>

</semantics>

</math><img src="./2f22ab0d13b5aee5075028e3cb66d10967cc8a4d.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -2.338ex; width:55.962ex; height:5.843ex;" alt="{\displaystyle {\text{write amplification}}={\frac {\text{data written to the flash memory}}{\text{data written by the host}}}}" loading="lazy"></dd></dl>

The two quantities used for calculation can be obtained via <a href="Self-Monitoring%2C_Analysis%2C_and_Reporting_Technology" class="mw-redirect" title="Self-Monitoring, Analysis, and Reporting Technology">SMART</a> statistics (ATA F7/F8;<a href="#cite_note-f7f8-14">[13]</a> ATA F1/F9).

<div class="mw-heading mw-heading2"><h2 id="Factors_affecting_the_value">Factors affecting the value</h2></div>

Many factors affect the write amplification of an SSD. The table below lists the primary factors and how they affect the write amplification. For factors that are variable, the table notes if it has a direct relationship or an inverse relationship. For example, as the amount of over-provisioning increases, the write amplification decreases (inverse relationship). If the factor is a toggle (enabled or disabled) function then it has either a positive or negative relationship.<a href="#cite_note-IBM_WA-1">[1]</a><a href="#cite_note-IBM_Hu_Haas-8">[7]</a><a href="#cite_note-Zsolt_WA-15">[14]</a>

<caption>Write amplification factors

</caption>

<th>Factor

</th>

<th>Description

</th>

<th>Type

</th>

<th>Relationship*

</th></tr>

<tr>

<td><a class="mw-selflink-fragment" href="#Garbage_collection">Garbage collection</a>

</td>

<td>The efficiency of the algorithm used to pick the next best block to erase and rewrite

</td>

<td style="background: lightblue;">Variable

</td>

<td style="background: lightgreen;">Inverse (good)

</td></tr>

<tr>

<td><a class="mw-selflink-fragment" href="#Over-provisioning">Over-provisioning</a>

</td>

<td>The percentage of over-provisioning capacity which is allocated to the SSD controller

</td>

<td style="background: Lightblue;">Variable

</td>

<td style="background: Lightgreen;">Inverse (good)

</td></tr>

<tr>

<td>Device's built-in DRAM buffer

</td>

<td>The built-in DRAM buffer of the storage device (usually SSD) may used to decrease the write amplification

</td>

<td style="background: Lightblue;">Variable

</td>

<td style="background: Lightgreen;">Inverse (good)

</td></tr>

<tr>

<td><a href="Trim_(computing)" title="Trim (computing)">TRIM</a> command for SATA or UNMAP for SCSI

</td>

<td>These commands must be sent by the operating system (OS) which tells the storage device which pages contain invalid data. SSDs receiving these commands can then reclaim the blocks containing these pages as free space when they are erased instead of copying the invalid data to clean pages.

</td>

<td style="background: Wheat;">Toggle

</td>

<td style="background: Lightgreen;">Positive (good)

</td></tr>

<tr>

<td>Zoned Storage

</td>

<td>Zoned Storage is a storage technology set that can reduces write amplification and product cost. It divides the storage device to many zones (usually the blocks of flash memory), and allows operating systems (OS) to write data sequently on zones. It needs both operating system and device (such as SSD) to support this feature.

</td>

<td style="background: Wheat;">Toggle

</td>

<td style="background: Lightgreen;">Positive (good)

</td></tr>

<tr>

<td><a class="mw-selflink-fragment" href="#Free_user_space">Free user space</a>

</td>

<td>The percentage of the user capacity free of actual user data; requires TRIM, otherwise the SSD gains no benefit from any free user capacity

</td>

<td style="background: Lightblue;">Variable

</td>

<td style="background: Lightgreen;">Inverse (good)

</td></tr>

<tr>

<td><a class="mw-selflink-fragment" href="#Secure_erase">Secure erase</a>

</td>

<td>Erases all user data and related metadata which resets the SSD to the initial out-of-box performance (until garbage collection resumes)

</td>

<td style="background: Wheat;">Toggle

</td>

<td style="background: Lightgreen;">Positive (good)

</td></tr>

<tr>

<td><a class="mw-selflink-fragment" href="#Wear_leveling">Wear leveling</a>

</td>

<td>The efficiency of the algorithm that ensures every block is written an equal number of times to all other blocks as evenly as possible

</td>

<td style="background: Lightblue;">Variable

</td>

<td>Depends

</td></tr>

<tr>

<td><a class="mw-selflink-fragment" href="#Separating_static_and_dynamic_data">Separating static and dynamic data</a>

</td>

<td>Grouping data based on how often it tends to change

</td>

<td style="background: Wheat;">Toggle

</td>

<td style="background: Lightgreen;">Positive (good)

</td></tr>

<tr>

<td><a class="mw-selflink-fragment" href="#Sequential_writes">Sequential writes</a>

</td>

<td>In theory, sequential writes have less write amplification, but other factors will still affect the real situation

</td>

<td style="background: Wheat;">Toggle

</td>

<td style="background: Lightgreen;">Positive (good)

</td></tr>

<tr>

<td><a class="mw-selflink-fragment" href="#Random_writes">Random writes</a>

</td>

<td>Writing non-sequential data and smaller data sizes will have greater impact on write amplification

</td>

<td style="background: Wheat;">Toggle

</td>

<td style="background: LightCoral;">Negative (bad)

</td></tr>

<tr>

<td><a href="Data_compression" title="Data compression">Data compression</a> which includes <a href="Data_deduplication" title="Data deduplication">data deduplication</a>

</td>

<td>Write amplification goes down and SSD speed goes up when data compression and deduplication eliminates more redundant data.

</td>

<td style="background: Lightblue;">Variable

</td>

<td style="background: Lightgreen;">Inverse (good)

</td></tr>

<tr>

<td>Using <a href="Multi-level_cell" title="Multi-level cell">Multi-level cell</a> (including TLC/QLC and onward) NAND in <a href="Multi-level_cell#Single-level_cell" title="Multi-level cell">SLC</a> mode

</td>

<td>This writes data at a rate of one bit per cell instead of the designed number of bits per cell (normally two bits per cell or three bits per cell) to speed up reads and writes. If capacity limits of the NAND in SLC mode are approached, the SSD must rewrite the oldest data written in SLC mode into MLC / TLC mode to allow space in the SLC mode NAND to be erased in order to accept more data. However, this approach can reduce wear by keeping frequently-changed pages in SLC mode to avoid programming these changes in MLC / TLC mode, because writing in MLC / TLC mode does more damage to the flash than writing in SLC mode. Therefore, this approach drives up write amplification but could reduce wear when writing patterns target frequently-written pages. However, sequential- and random-write patterns will aggravate the damage because there are no or few frequently-written pages that could be contained in the SLC area, forcing old data to need to be constantly be rewritten to MLC / TLC from the SLC area. This method is sometimes called "SLC cache" or "SLC buffer". It has two types of "SLC buffer"; one type is static SLC buffer (a SLC buffer based on the over-provisioning area), another type is dynamic SLC buffer (dynamically change its size on factors such as free user capacity). However the SLC buffer usually does not accelerate read speed.

</td>

<td style="background: Wheat;">Toggle

</td>

<td>Depends

</td></tr></tbody></table>

<caption>*Relationship definitions

</caption>

<th>Type

</th>

<th>Relationship modified

</th>

<th>Description

</th></tr>

<tr>

<td style="background: Lightblue;" rowspan="3">Variable

</td>

<td style="background: LightCoral;">Direct

</td>

<td style="background: LightCoral;">As the factor increases the WA increases

</td></tr>

<tr>

<td style="background: Lightgreen;">Inverse

</td>

<td style="background: Lightgreen;">As the factor increases the WA decreases

</td></tr>

<tr>

<td>Depends

</td>

<td>Depends on different manufacturers and models

</td></tr>

<tr>

<td style="background: wheat;" rowspan="3">Toggle

</td>

<td style="background: Lightgreen;">Positive

</td>

<td style="background: Lightgreen;">When the factor is present the WA decreases

</td></tr>

<tr>

<td style="background: LightCoral;">Negative

</td>

<td style="background: LightCoral;">When the factor is present the WA increases

</td></tr>

<tr>

<td>Depends

</td>

<td>Depends on different manufacturers and models

</td></tr></tbody></table>

<div class="mw-heading mw-heading2"><h2 id="Garbage_collection">Garbage collection</h2></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Garbage_collection_(computer_science)" title="Garbage collection (computer science)">Garbage collection (computer science)</a></div>

Data is written to the flash memory in units called pages (made up of multiple cells). However, the memory can only be erased in larger units called blocks (made up of multiple pages).<a href="#cite_note-L_Smith-2">[2]</a> If the data in some of the pages of the block are no longer needed (also called stale pages), only the pages with good data in that block are read and rewritten into another previously erased empty block.<a href="#cite_note-K_Smith-4">[3]</a> Then the free pages left by not moving the stale data are available for new data. This is a process called <a href="Garbage_collection_(computer_science)" title="Garbage collection (computer science)">garbage collection</a> (GC).<a href="#cite_note-IBM_WA-1">[1]</a><a href="#cite_note-OCZ_WA-12">[11]</a> All SSDs include some level of garbage collection, but they may differ in when and how fast they perform the process.<a href="#cite_note-OCZ_WA-12">[11]</a> Garbage collection is a big part of write amplification on the SSD.<a href="#cite_note-IBM_WA-1">[1]</a><a href="#cite_note-OCZ_WA-12">[11]</a>

Reads do not require an erase of the flash memory, so they are not generally associated with write amplification. In the limited chance of a <a href="Read_disturb" class="mw-redirect" title="Read disturb">read disturb</a> error, the data in that block is read and rewritten, but this would not have any material impact on the write amplification of the drive.<a href="#cite_note-16">[15]</a>

<div class="mw-heading mw-heading3"><h3 id="Background_garbage_collection">Background garbage collection</h3></div>

The process of garbage collection involves reading and rewriting data to the flash memory. This means that a new write from the host will first require a read of the whole block, a write of the parts of the block which still include valid data, and then a write of the new data. This can significantly reduce the performance of the system.<a href="#cite_note-Mehling_Garbage-17">[16]</a> Many SSD controllers implement background garbage collection (BGC), sometimes called idle garbage collection or idle-time garbage collection (ITGC), where the controller uses idle time to consolidate blocks of flash memory before the host needs to write new data. This enables the performance of the device to remain high.<a href="#cite_note-Conley-18">[17]</a>

If the controller were to background garbage collect all of the spare blocks before it was absolutely necessary, new data written from the host could be written without having to move any data in advance, letting the performance operate at its peak speed. The trade-off is that some of those blocks of data are actually not needed by the host and will eventually be deleted, but the OS did not tell the controller this information (until <a href="#TRIM">TRIM</a> was introduced). The result is that the soon-to-be-deleted data is rewritten to another location in the flash memory, increasing the write amplification. In some of the SSDs from <a href="OCZ" title="OCZ">OCZ</a> the background garbage collection clears up only a small number of blocks then stops, thereby limiting the amount of excessive writes.<a href="#cite_note-OCZ_WA-12">[11]</a> Another solution is to have an efficient garbage collection system which can perform the necessary moves in parallel with the host writes. This solution is more effective in high write environments where the SSD is rarely idle.<a href="#cite_note-Layton-19">[18]</a> The <a href="SandForce" title="SandForce">SandForce</a> SSD controllers<a href="#cite_note-Mehling_Garbage-17">[16]</a> and the systems from <a href="Violin_Memory" title="Violin Memory">Violin Memory</a> have this capability.<a href="#cite_note-Zsolt_WA-15">[14]</a>

<div class="mw-heading mw-heading3"><h3 id="Filesystem-aware_garbage_collection">Filesystem-aware garbage collection</h3></div>

In 2010, some manufacturers (notably Samsung) introduced SSD controllers that extended the concept of BGC to analyze the <a href="File_system" title="File system">file system</a> used on the SSD, to identify recently deleted files and <a href="Disk_partitioning" title="Disk partitioning">unpartitioned space</a>. Samsung claimed that this would ensure that even systems (operating systems and SATA controller hardware) which do not support <a href="Trim_(computing)" title="Trim (computing)">TRIM</a> could achieve similar performance. The operation of the Samsung implementation appeared to assume and require an <a href="NTFS" title="NTFS">NTFS</a> file system.<a href="#cite_note-Bell_Garbage-20">[19]</a> It is not clear if this feature is still available in currently shipping SSDs from these manufacturers. Systemic data corruption has been reported on these drives if they are not formatted properly using <a href="Master_boot_record" title="Master boot record">MBR</a> and NTFS.

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Trim_(computing)" title="Trim (computing)">Trim (computing)</a></div>

<a href="Trim_(computing)" title="Trim (computing)">TRIM</a> is a SATA command that enables the operating system to tell an SSD which blocks of previously saved data are no longer needed as a result of file deletions or volume formatting. When an LBA is replaced by the OS, as with an overwrite of a file, the SSD knows that the original LBA can be marked as stale or invalid and it will not save those blocks during garbage collection. If the user or operating system erases a file (not just remove parts of it), the file will typically be marked for deletion, but the actual contents on the disk are never actually erased. Because of this, the SSD does not know that it can erase the LBAs previously occupied by the file, so the SSD will keep including such LBAs in the garbage collection.<a href="#cite_note-Christiansen-21">[20]</a><a href="#cite_note-SSD_Improv-22">[21]</a><a href="#cite_note-Mehling_TRIM-23">[22]</a>

The introduction of the TRIM command resolves this problem for operating systems that <a href="Trim_(computing)#Operating_system_support" title="Trim (computing)">support</a> it like <a href="Features_new_to_Windows_7#Solid_state_drives" title="Features new to Windows 7">Windows 7</a>,<a href="#cite_note-SSD_Improv-22">[21]</a> Mac OS (latest releases of Snow Leopard, Lion, and Mountain Lion, patched in some cases),<a href="#cite_note-24">[23]</a> <a href="FreeBSD" title="FreeBSD">FreeBSD</a> since version 8.1,<a href="#cite_note-25">[24]</a> and <a href="Linux" title="Linux">Linux</a> since version 2.6.33 of the <a href="Linux_kernel_mainline" class="mw-redirect" title="Linux kernel mainline">Linux kernel mainline</a>.<a href="#cite_note-26">[25]</a> When a file is permanently deleted or the drive is formatted, the OS sends the TRIM command along with the LBAs that no longer contain valid data. This informs the SSD that the LBAs in use can be erased and reused. This reduces the LBAs needing to be moved during garbage collection. The result is the SSD will have more free space enabling lower write amplification and higher performance.<a href="#cite_note-Christiansen-21">[20]</a><a href="#cite_note-SSD_Improv-22">[21]</a><a href="#cite_note-Mehling_TRIM-23">[22]</a>

<div class="mw-heading mw-heading3"><h3 id="Limitations_and_dependencies">Limitations and dependencies</h3></div>

The TRIM command also needs the support of the SSD. If the <a href="Firmware" title="Firmware">firmware</a> in the SSD does not have support for the TRIM command, the LBAs received with the TRIM command will not be marked as invalid and the drive will continue to garbage collect the data assuming it is still valid. Only when the OS saves new data into those LBAs will the SSD know to mark the original LBA as invalid.<a href="#cite_note-Mehling_TRIM-23">[22]</a> SSD Manufacturers that did not originally build TRIM support into their drives can either offer a firmware upgrade to the user, or provide a separate utility that extracts the information on the invalid data from the OS and separately TRIMs the SSD. The benefit would be realized only after each run of that utility by the user. The user could set up that utility to run periodically in the background as an automatically scheduled task.<a href="#cite_note-Mehling_Garbage-17">[16]</a>

Just because an SSD supports the TRIM command does not necessarily mean it will be able to perform at top speed immediately after a TRIM command. The space which is freed up after the TRIM command may be at random locations spread throughout the SSD. It will take a number of passes of writing data and garbage collecting before those spaces are consolidated to show improved performance.<a href="#cite_note-Mehling_TRIM-23">[22]</a>

Even after the OS and SSD are configured to support the TRIM command, other conditions might prevent any benefit from TRIM. As of early 2010, databases and RAID systems are not yet TRIM-aware and consequently will not know how to pass that information on to the SSD. In those cases the SSD will continue to save and garbage collect those blocks until the OS uses those LBAs for new writes.<a href="#cite_note-Mehling_TRIM-23">[22]</a>

The actual benefit of the TRIM command depends upon the free user space on the SSD. If the user capacity on the SSD was 100 GB and the user actually saved 95 GB of data to the drive, any TRIM operation would not add more than 5 GB of free space for garbage collection and wear leveling. In those situations, increasing the amount of over-provisioning by 5 GB would allow the SSD to have more consistent performance because it would always have the additional 5 GB of additional free space without having to wait for the TRIM command to come from the OS.<a href="#cite_note-Mehling_TRIM-23">[22]</a>

<div class="mw-heading mw-heading2"><h2 id="Over-provisioning">Over-provisioning</h2></div>

Over-provisioning (sometimes spelled as OP, over provisioning, or overprovisioning) is the difference between the physical capacity of the flash memory and the logical capacity presented through the <a href="Operating_system" title="Operating system">operating system</a> (OS) as available for the user. During the garbage collection, wear-leveling, and bad block mapping operations on the SSD, the additional space from over-provisioning helps lower the write amplification when the controller writes to the flash memory.<a href="#cite_note-Lucchesi-5">[4]</a><a href="#cite_note-Jim_Bagley-27">[26]</a><a href="#cite_note-Drossel-28">[27]</a> Over-provisioning region is also used for storing firmware data like <a href="Flash_Translation_Layer" class="mw-redirect" title="Flash Translation Layer">FTL</a> tables. Over-provisioning is represented as a percentage ratio of extra capacity to user-available capacity:<a href="#cite_note-Smith_2012-29">[28]</a>

<mtext>over-provisioning</mtext>

</mrow>

<mfrac>

<mrow>

<mtext>physical capacity</mtext>

</mrow>

<mtext>user capacity</mtext>

</mrow>

<mtext>user capacity</mtext>

</mfrac>

</mrow>

</mstyle>

</mrow>

<annotation encoding="application/x-tex">{\displaystyle {\text{over-provisioning}}={\frac {{\text{physical capacity}}-{\text{user capacity}}}{\text{user capacity}}}}</annotation>

</semantics>

</math><img src="./ce4e77cf8d6ea6b446132d4831465612976bfe10.svg" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -2.338ex; width:54.698ex; height:5.843ex;" alt="{\displaystyle {\text{over-provisioning}}={\frac {{\text{physical capacity}}-{\text{user capacity}}}{\text{user capacity}}}}" loading="lazy"></dd></dl>

Over-provisioning typically comes from three sources:

<ol><li>The computation of the capacity and use of <a href="Gigabyte" title="Gigabyte">gigabyte</a> (GB) as the unit instead of <a href="Gibibyte" class="mw-redirect" title="Gibibyte">gibibyte</a> (GiB). Both HDD and SSD vendors use the term GB to represent a decimal GB or 1,000,000,000 (= 109) bytes. Like most other electronic storage, flash memory is assembled in powers of two, so calculating the physical capacity of an SSD would be based on 1,073,741,824 (= 230) per binary GB or GiB. The difference between these two values is 7.37% (= (230 − 109) / 109 × 100%). Therefore, a 128 GB SSD with 0% additional over-provisioning would provide 128,000,000,000 bytes to the user (out of 137,438,953,472 total). This initial 7.37% is typically not counted in the total over-provisioning number, and the true amount available is usually less as some storage space is needed for the controller to keep track of non-operating system data such as block status flags.<a href="#cite_note-Jim_Bagley-27">[26]</a><a href="#cite_note-Smith_2012-29">[28]</a> The 7.37% figure may extend to 9.95% in the terabyte range, as manufacturers take advantage of a further grade of binary/decimal unit divergence to offer 1 or 2 TB drives of 1000 and 2000 GB capacity (931 and 1862 GiB), respectively, instead of 1024 and 2048 GB (as 1 TB = 1,000,000,000,000 bytes in decimal terms, but 1,099,511,627,776 in binary).</li>

<li>Manufacturer decision. This is done typically at 0%, 7%, 14% or 28%, based on the difference between the decimal gigabyte of the physical capacity and the decimal gigabyte of the available space to the user. As an example, a manufacturer might publish a specification for their SSD at 100, 120 or 128 GB based on 128 GB of possible capacity. This difference is 28%, 14%, 7% and 0% respectively and is the basis for the manufacturer claiming they have 28% of over-provisioning on their drive. This does not count the additional 7.37% of capacity available from the difference between the decimal and binary gigabyte.<a href="#cite_note-Jim_Bagley-27">[26]</a><a href="#cite_note-Smith_2012-29">[28]</a> Mid-end and high-end flash products are usually have bigger over-provisioning percentage. Adapt the higher over-provisioning percentage will increase the cost of flash product.</li>

<li>Known free user space on the drive, gaining endurance and performance at the expense of reporting unused portions, or at the expense of current or future capacity. This free space can be identified by the operating system using the TRIM command. Alternatively, some SSDs provide a utility that permits the end user to select additional over-provisioning. Furthermore, if any SSD is set up with an overall partitioning layout smaller than 100% of the available space, that unpartitioned space will be automatically used by the SSD as over-provisioning as well.<a href="#cite_note-Smith_2012-29">[28]</a> Yet another source of over-provisioning is operating system minimum free space limits; some operating systems maintain a certain minimum free space per drive, particularly on the boot or main drive. If this additional space can be identified by the SSD, perhaps through continuous usage of the TRIM command, then this acts as semi-permanent over-provisioning. Over-provisioning often takes away from user capacity, either temporarily or permanently, but it gives back reduced write amplification, increased endurance, and increased performance.<a href="#cite_note-Layton-19">[18]</a><a href="#cite_note-Drossel-28">[27]</a><a href="#cite_note-Anand_Spare_Area-30">[29]</a><a href="#cite_note-31">[30]</a><a href="#cite_note-32">[31]</a></li></ol>

<div class="mw-heading mw-heading3"><h3 id="Free_user_space">Free user space</h3></div>

The SSD controller will use free blocks on the SSD for garbage collection and wear leveling. The portion of the user capacity which is free from user data (either already TRIMed or never written in the first place) will look the same as over-provisioning space (until the user saves new data to the SSD). If the user saves data consuming only half of the total user capacity of the drive, the other half of the user capacity will look like additional over-provisioning (as long as the TRIM command is supported in the system).<a href="#cite_note-Mehling_TRIM-23">[22]</a><a href="#cite_note-AnandTech_Ant-33">[32]</a>

<div class="mw-heading mw-heading2"><h2 id="Secure_erase">Secure erase</h2></div>

<div role="note" class="hatnote navigation-not-searchable">See also: <a href="Data_sanitization#Secure_erase" title="Data sanitization">Data sanitization § Secure erase</a></div>

The ATA Secure Erase command is designed to remove all user data from a drive. With an SSD without integrated encryption, this command will put the drive back to its original out-of-box state. This will initially restore its performance to the highest possible level and the best (lowest number) possible write amplification, but as soon as the drive starts garbage collecting again the performance and write amplification will start returning to the former levels.<a href="#cite_note-AnandTech_Anthology_11-34">[33]</a><a href="#cite_note-Malventano-35">[34]</a> Many tools use the ATA Secure Erase command to reset the drive and provide a user interface as well. One free tool that is commonly referenced in the industry is called <a href="HDDerase" title="HDDerase">HDDerase</a>.<a href="#cite_note-Malventano-35">[34]</a><a href="#cite_note-HDDERASE-36">[35]</a> <a href="GParted" title="GParted">GParted</a> and <a href="Ubuntu_(operating_system)" class="mw-redirect" title="Ubuntu (operating system)">Ubuntu</a> live CDs provide a bootable Linux system of disk utilities including secure erase.<a href="#cite_note-37">[36]</a>

Drives which encrypt all writes on the fly can implement ATA Secure Erase in another way. They simply <a href="Zeroize" class="mw-redirect" title="Zeroize">zeroize</a> and generate a new random encryption key each time a secure erase is done. In this way the old data cannot be read any more, as it cannot be decrypted.<a href="#cite_note-38">[37]</a> Some drives with an integrated encryption will physically clear all blocks after that as well, while other drives may require a TRIM command to be sent to the drive to put the drive back to its original out-of-box state (as otherwise their performance may not be maximized).<a href="#cite_note-39">[38]</a>

<div class="mw-heading mw-heading2"><h2 id="Wear_leveling">Wear leveling</h2></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Wear_leveling" title="Wear leveling">Wear leveling</a></div>

If a particular block was programmed and erased repeatedly without writing to any other blocks, that block would wear out before all the other blocks – thereby prematurely ending the life of the SSD. For this reason, SSD controllers use a technique called <a href="Wear_leveling" title="Wear leveling">wear leveling</a> to distribute writes as evenly as possible across all the flash blocks in the SSD.

In a perfect scenario, this would enable every block to be written to its maximum life so they all fail at the same time. Unfortunately, the process to evenly distribute writes requires data previously written and not changing (cold data) to be moved, so that data which are changing more frequently (hot data) can be written into those blocks. Each time data are relocated without being changed by the host system, this increases the write amplification and thus reduces the life of the flash memory. The key is to find an optimal algorithm which maximizes them both.<a href="#cite_note-Li-Pin_Chang-40">[39]</a>

<div class="mw-heading mw-heading3"><h3 id="Separating_static_and_dynamic_data">Separating static and dynamic data</h3></div>

The separation of static (cold) and dynamic (hot) data to reduce write amplification is not a simple process for the SSD controller. The process requires the SSD controller to separate the LBAs with data which is constantly changing and requiring rewriting (dynamic data) from the LBAs with data which rarely changes and does not require any rewrites (static data). If the data is mixed in the same blocks, as with almost all systems today, any rewrites will require the SSD controller to rewrite both the dynamic data (which caused the rewrite initially) and static data (which did not require any rewrite). Any garbage collection of data that would not have otherwise required moving will increase write amplification. Therefore, separating the data will enable static data to stay at rest and if it never gets rewritten it will have the lowest possible write amplification for that data. The drawback to this process is that somehow the SSD controller must still find a way to wear level the static data because those blocks that never change will not get a chance to be written to their maximum P/E cycles.<a href="#cite_note-IBM_WA-1">[1]</a>

<div class="mw-heading mw-heading2"><h2 id="Performance_implications">Performance implications</h2></div>

<div class="mw-heading mw-heading3"><h3 id="Sequential_writes">Sequential writes</h3></div>

When an SSD is writing large amounts of data sequentially, the write amplification is equal to one meaning there is less write amplification. The reason is as the data is written, the entire (flash) block is filled sequentially with data related to the same file. If the OS determines that file is to be replaced or deleted, the entire block can be marked as invalid, and there is no need to read parts of it to garbage collect and rewrite into another block. It will need only to be erased, which is much easier and faster than the read–erase–modify–write process needed for randomly written data going through garbage collection.<a href="#cite_note-IBM_Hu_Haas-8">[7]</a>

<div class="mw-heading mw-heading3"><h3 id="Random_writes">Random writes</h3></div>

The peak random write performance on an SSD is driven by plenty of free blocks after the SSD is completely garbage collected, secure erased, 100% TRIMed, or newly installed. The maximum speed will depend upon the number of parallel flash channels connected to the SSD controller, the efficiency of the firmware, and the speed of the flash memory in writing to a page. During this phase the write amplification will be the best it can ever be for random writes and will be approaching one. Once the blocks are all written once, garbage collection will begin and the performance will be gated by the speed and efficiency of that process. Write amplification in this phase will increase to the highest levels the drive will experience.<a href="#cite_note-IBM_Hu_Haas-8">[7]</a>

<div class="mw-heading mw-heading2"><h2 id="Impact_on_performance">Impact on performance</h2></div>

The overall performance of an SSD is dependent upon a number of factors, including write amplification. Writing to a flash memory device takes longer than reading from it.<a href="#cite_note-Conley-18">[17]</a> An SSD generally uses multiple flash memory components connected in parallel as channels to increase performance. If the SSD has a high write amplification, the controller will be required to write that many more times to the flash memory. This requires even more time to write the data from the host. An SSD with a low write amplification will not need to write as much data and can therefore be finished writing sooner than a drive with a high write amplification.<a href="#cite_note-IBM_WA-1">[1]</a><a href="#cite_note-IBM_Perf-9">[8]</a>

<div class="mw-heading mw-heading2"><h2 id="Product_statements">Product statements</h2></div>

In September 2008, <a href="Intel" title="Intel">Intel</a> announced the X25-M SATA SSD with a reported WA as low as 1.1.<a href="#cite_note-Anand_WA-6">[5]</a><a href="#cite_note-41">[40]</a> In April 2009, <a href="SandForce" title="SandForce">SandForce</a> announced the SF-1000 SSD Processor family with a reported WA of 0.5 which uses data compression to achieve a sub 1.0 WA.<a href="#cite_note-Anand_WA-6">[5]</a><a href="#cite_note-42">[41]</a> Before this announcement, a write amplification of 1.0 was considered the lowest that could be attained with an SSD.<a href="#cite_note-Conley-18">[17]</a>

<ul><li><a href="Flash_file_system" title="Flash file system">Flash file system</a></li>

<li><a href="Partition_alignment" title="Partition alignment">Partition alignment</a></li>

<li><a href="Wear_leveling" title="Wear leveling">Wear leveling</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2></div>

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<li id="cite_note-3"><a href="#cite_ref-3">^</a> Data is written to the flash memory in units called pages, which are made up of multiple cells. However, the flash memory can be erased only in larger units called blocks, which are made up of multiple pages.<a href="#cite_note-L_Smith-2">[2]</a>

</li>

</ol></div></div>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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</ol></div>

<div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2></div>

<ul><li> Media related to <a href="https://commons.wikimedia.org/wiki/Category:Write_amplification" class="extiw external" title="commons:Category:Write amplification">Write amplification</a> at Wikimedia Commons</li></ul>

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</style><div id="Solid-state_drives316" style="font-size:114%;margin:0 4em"><a href="Solid-state_drive" title="Solid-state drive">Solid-state drives</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Key terminology</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Encryption" title="Encryption">Encryption</a></li>

<li><a href="Flash_file_system" title="Flash file system">Flash file system</a></li>

<li><a href="Flash_memory" title="Flash memory">Flash memory</a></li>

<li><a href="Flash_memory_controller" title="Flash memory controller">Flash memory controller</a></li>

<li><a href="Garbage_collection_(SSD)" class="mw-redirect" title="Garbage collection (SSD)">Garbage collection</a></li>

<li><a href="Flash_memory#Memory_wear" title="Flash memory">Memory wear</a></li>

<li><a href="Open-channel_SSD" title="Open-channel SSD">Open-channel SSD</a></li>

<li><a class="mw-selflink-fragment" href="#Over-provisioning">Over-provisioning</a></li>

<li><a href="Flash_memory#Read_disturb" title="Flash memory">Read disturb</a></li>

<li><a class="mw-selflink-fragment" href="#Secure_erase">Secure erase</a></li>

<li><a href="Solid-state_storage" title="Solid-state storage">Solid-state storage</a></li>

<li><a href="Trim_(computing)" title="Trim (computing)">Trim command</a></li>

<li><a href="Wear_leveling" title="Wear leveling">Wear leveling</a></li>

</ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Flash manufacturers</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Micron_Technology" title="Micron Technology">Micron</a></li>

<li><a href="Samsung_Electronics" title="Samsung Electronics">Samsung</a></li>

<li><a href="SK_Hynix" title="SK Hynix">SK Hynix</a>

<ul><li>Bought <a href="Intel" title="Intel">Intel</a>'s NAND flash chips and NAND flash SSD businesses and renamed the SSD business as Solidigm</li></ul></li>

<li>Flash Forward (joint venture between <a href="Sandisk" title="Sandisk">Sandisk</a> and <a href="Kioxia" title="Kioxia">Kioxia</a>)</li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="List_of_flash_memory_controller_manufacturers" title="List of flash memory controller manufacturers">Controllers</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Captive</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Sandisk" title="Sandisk">Sandisk</a>

<ul><li><a href="Western_Digital" title="Western Digital">Western Digital</a></li>

<li><a href="Fusion-io" title="Fusion-io">Fusion-io</a></li>

<li><a href="Kioxia" title="Kioxia">Kioxia</a>

<ul><li><a href="OCZ" title="OCZ">OCZ</a> (bankrupt, assets sold to Toshiba, which later spun off its SSD and flash business to Kioxia)</li>

<li><a href="Indilinx" title="Indilinx">Indilinx</a> (bought by OCZ)</li></ul></li>

<li><a href="Micron_Technology" title="Micron Technology">Micron</a></li>

<li><a href="Samsung_Electronics" title="Samsung Electronics">Samsung</a></li>

<li><a href="Seagate_Technology" title="Seagate Technology">Seagate</a>

<ul><li><a href="SandForce" title="SandForce">SandForce</a></li></ul></li>

<li><a href="SK_Hynix" title="SK Hynix">SK Hynix</a>

<ul><li>Bought <a href="Intel" title="Intel">Intel</a>'s NAND flash chips and NAND flash SSD businesses including controllers and renamed the SSD business Solidigm</li></ul></li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Independent</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Greenliant_Systems" title="Greenliant Systems">Greenliant Systems</a></li>

<li><a href="JMicron" title="JMicron">Maxiotek</a></li>

<li><a href="Marvell_Technology_Group" class="mw-redirect" title="Marvell Technology Group">Marvell</a></li>

<li><a href="Phison" title="Phison">Phison</a></li>

<li><a href="PMC-Sierra" title="PMC-Sierra">PMC-Sierra</a></li>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">SSD manufacturers</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="List_of_solid-state_drive_manufacturers" title="List of solid-state drive manufacturers">List of solid-state drive manufacturers</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Interfaces</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Advanced_Host_Controller_Interface" title="Advanced Host Controller Interface">Advanced Host Controller Interface</a> (AHCI)</li>

<li><a href="Fibre_Channel" title="Fibre Channel">Fibre Channel</a> (FC)</li>

<li><a href="NVM_Express" title="NVM Express">NVM Express</a> (NVMe)</li>

<li><a href="PCI_Express" title="PCI Express">PCI Express</a> (PCIe)</li>

<li><a href="SATA_Express" title="SATA Express">SATA Express</a></li>

<li><a href="Serial_ATA" class="mw-redirect" title="Serial ATA">Serial ATA</a> (SATA)</li>

<li><a href="Serial_attached_SCSI" class="mw-redirect" title="Serial attached SCSI">Serial attached SCSI</a> (SAS)</li>

<li><a href="USB" title="USB">Universal Serial Bus</a> (USB)</li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Configurations</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Hard_disk_drive#Form_factors" title="Hard disk drive">HDD form factors</a></li>

<li><a href="MSATA" class="mw-redirect" title="MSATA">mSATA</a></li>

<li><a href="PCI_Express" title="PCI Express">PCI Express</a> <a href="Expansion_card" title="Expansion card">expansion card</a></li>

<li><a href="Thunderbolt_(interface)" title="Thunderbolt (interface)">Thunderbolt</a>

<li><a href="EDSFF" class="mw-redirect" title="EDSFF">EDSFF</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related organizations</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="International_Committee_for_Information_Technology_Standards" title="International Committee for Information Technology Standards">INCITS</a></li>

<li><a href="JEDEC" title="JEDEC">JEDEC / JC-42, JC-64.8</a></li>

<li><a href="NVM_Express#History" title="NVM Express">NVMHCI Work Group</a></li>

<li><a href="Small_Form_Factor_Committee" title="Small Form Factor Committee">SFF Committee</a></li>

</div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div>

<ul><li> Category</li></ul>

</div></td></tr></tbody></table></div>

</div><div><div class="zim-footer">

This article is issued from <a class="external text" title="Last edited on 2025-08-06" href="https://en.wikipedia.org/wiki/?title=Write_amplification&oldid=1304465456">Wikipedia</a>. The text is available under <a class="external text" href="https://creativecommons.org/licenses/by-sa/4.0/deed.en">Creative Commons Attribution-Share Alike 4.0</a> unless otherwise noted. Additional terms may apply for the media files.

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